1. Field of Invention
This application relates to a method for manufacturing a printed circuit board that mounts an integrated circuit device thereon, and to the printed circuit board.
2. Description of Related Art
Semiconductor devices are becoming smaller in size, due to demands to downsize electronic apparatuses. Accordingly, pins for inputting or outputting an electric signal to or from the semiconductor devices are getting miniaturized and provided at a narrow pitch. As a semiconductor device is further miniaturized with its pins provided at a narrower pitch, a probe of a tester will accidentally contact pins other than a particular pin of the semiconductor device mounted on a printed circuit board when the device is tested. Therefore, test lands that are respectively electrically connected to pins of a semiconductor device mounted on a printed circuit board are provided at an outer or edge portion of the printed circuit board, as disclosed in FIG. 1 of Japanese Laid-Open Patent Publication No. 11-188857. When the semiconductor device is tested, a probe of a tester is applied to the test land. Because the probe is applied to the test land, which is provided at a portion where enough space is allowed for the test land, contact of the probe to other pins can be prevented.